DDR-2 ON THE WAY => 533Mbps

this IS VERY INTERESTING := ".......KOREAN DRAM GIANT Samsung will announce today it has created a 512Mbit DDR-II memory chip, conforming with the JEDEC DDR-II standard set in March. And IBM has developed a DDR-II memory interface chip, meaning the high speed platform is almost ready to roll. The memory chip can transfer data at 533Mbps, claimed Samsung, but that can be extended to 666Mbps for special environments and for networks, the company said. The chip uses a 60 ball grid array package, and includes off chip driver calibration, on die termination and posted CAS for better bus efficiency. The firm will say that products will go into volume in the third quarter of 2003*.........."

also "........The first spin of DDR technology doubled the performance of standard synchronous DRAM by pumping data bits on both the rising and falling edge of the clock cycle. Macri said the revised version doubles the total bandwidth again by increasing the data fetch from 2 to 4 bits. As a result, the same 100-MHz SDRAM core that became a 200-Mbit/s-per-pin DDR device will jump to 400 Mbits/s per pin with DDR-II. " "John Metcow" <[email hidden]> wrote in message news:... > this IS VERY INTERESTING := > > > ".......KOREAN DRAM GIANT Samsung will announce today > it has created a 512Mbit DDR-II memory chip,conforming

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> with the JEDEC DDR-II standard set in March. > And IBM has developed a DDR-II memory interface chip, > meaning the high speed platform is almost ready to > roll. > > The memory chip can transfer data at 533Mbps, claimed > Samsung, but that can be extended to 666Mbps for > special environments and for networks, the company > said. > > The chip uses a 60 ball grid array package, and > includes off chip driver calibration, on die > termination and posted CAS for better bus efficiency. > > The firm will say that products will go into volume

in > the third quarter of 2003*.........." > > >

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>"John Metcow" <[email hidden]> wrote > ".......KOREAN DRAM GIANT Samsung will announce today > it has created a 512Mbit DDR-II memory chip, conforming > with the JEDEC DDR-II standard set in March. > And IBM has developed a DDR-II memory interface chip, > meaning the high speed platform is almost ready to > roll.

Nascar Racing 2002 will still run slow. -- -- Fran�ois M�nard <ymenard> -- http://www.ymenard.8m.com/ -- This announcement is brought to you by the Shimago-Dominguez Corporation - helping America into the New World...

Things are getting interesting:) "John Metcow" <[email hidden]> wrote in message news:[email hidden]...

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> this IS VERY INTERESTING := > > > ".......KOREAN DRAM GIANT Samsung will announce today > it has created a 512Mbit DDR-II memory chip, conforming > with the JEDEC DDR-II standard set in March. > And IBM has developed a DDR-II memory interface chip, > meaning the high speed platform is almost ready to > roll. > > The memory chip can transfer data at 533Mbps, claimed > Samsung, but that can be extended to 666Mbps for > special environments and for networks, the company > said. > > The chip uses a 60 ball grid array package, and > includes off chip driver calibration, on die > termination and posted CAS for better bus efficiency. > > The firm will say that products will go into volume in > the third quarter of 2003*.........." > > >

Third quarter of 2003.....a YEAR from now.....sigh... "papasurf" <[email hidden]> wrote in message news:lTXI8.7481$[email hidden]... Things are getting interesting:) "John Metcow" <[email hidden]> wrote in message news:[email hidden]...

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> this IS VERY INTERESTING := > > > ".......KOREAN DRAM GIANT Samsung will announce today > it has created a 512Mbit DDR-II memory chip, conforming > with the JEDEC DDR-II standard set in March. > And IBM has developed a DDR-II memory interface chip, > meaning the high speed platform is almost ready to > roll. > > The memory chip can transfer data at 533Mbps, claimed > Samsung, but that can be extended to 666Mbps for > special environments and for networks, the company > said. > > The chip uses a 60 ball grid array package, and > includes off chip driver calibration, on die > termination and posted CAS for better bus efficiency. > > The firm will say that products will go into volume in > the third quarter of 2003*.........." > > >

On Wed, 29 May 2002 09:21:23 +0800, "John Metcow" <[email hidden]> wrote: >The memory chip can transfer data at 533Mbps, claimed >Samsung, but that can be extended to 666Mbps for >special environments and for networks, the company >said. I wonder what they mean by "Special" environments? Hmm... The night was black was no use holding back Cos I just had to see was someone watching me? In the mist dark figures move and twist was all this for real or some kind of hell? 666 megahertz RAM of The Beast Hell and fire was spawned to be released! Torches blazed and sacred chants were praised as they start to cry hands held to the sky In the night the fires burning bright the ritual has begun Satan's work is done 666 megahertz RAM of The Beast Sacrifice is going on tonight! This can't go on I must inform the law Can this still be real or some crazy dream? but I feel drawn towards the evil chanting hordes they seem to mesmerize me...can't avoid their eyes! 666 megahertz RAM of The Beast 666 the one for you and me!

>> The memory chip can transfer data at 533Mbps, claimed >> Samsung, but that can be extended to 666Mbps for >> special environments and for networks, the company >> said. > > I wonder what they mean by "Special" environments? Environments where they don't have to worry about really long trace lengths and socketed memory modules. eg, high end routers/switches, videocards... etc. When you have the ram in a socket, you have to back off the timings/clockrate somewhat. -JB

Pray it is a typo? Q3 2002 sounds better to me :) -- -Lee ---------- "Brandon Demko" <[email hidden]> wrote in message news:U8%I8.4709$[email hidden]... Third quarter of 2003.....a YEAR from now.....sigh... "papasurf" <[email hidden]> wrote in message news:lTXI8.7481$[email hidden]... Things are getting interesting:) "John Metcow" <[email hidden]> wrote in message news:[email hidden]... > this IS VERY INTERESTING := > > > ".......KOREAN DRAM GIANT Samsung will announce today > it has created a 512Mbit DDR-II memory chip, conforming > with the JEDEC DDR-II standard set in March. > And IBM has developed a DDR-II memory interface chip, > meaning the high speed platform is almost ready to > roll. > > The memory chip can transfer data at 533Mbps, claimed > Samsung, but that can be extended to 666Mbps for > special environments and for networks, the company > said. > > The chip uses a 60 ball grid array package, and > includes off chip driver calibration, on die > termination and posted CAS for better bus efficiency. > > The firm will say that products will go into volume in > the third quarter of 2003*.........." > > >

522Mbps?? Thats slow, thats rougly 52MB/sec. I hope they mean 522MB/s :) "John Metcow" <[email hidden]> wrote in message news:[email hidden]...

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> this IS VERY INTERESTING := > > > ".......KOREAN DRAM GIANT Samsung will announce today > it has created a 512Mbit DDR-II memory chip, conforming > with the JEDEC DDR-II standard set in March. > And IBM has developed a DDR-II memory interface chip, > meaning the high speed platform is almost ready to > roll. > > The memory chip can transfer data at 533Mbps, claimed > Samsung, but that can be extended to 666Mbps for > special environments and for networks, the company > said. > > The chip uses a 60 ball grid array package, and > includes off chip driver calibration, on die > termination and posted CAS for better bus efficiency. > > The firm will say that products will go into volume in > the third quarter of 2003*.........." > > >

or do they mean per chip?, then reading from chips parallel would mean faster tranferrates i guess. "Andreas Nystrom" <[email hidden]> wrote in message news:bR5J8.40658$[email hidden]...

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> 522Mbps?? Thats slow, thats rougly 52MB/sec. > I hope they mean 522MB/s :) > > "John Metcow" <[email hidden]> wrote in message > news:[email hidden]... > > this IS VERY INTERESTING := > > > > > > ".......KOREAN DRAM GIANT Samsung will announce today > > it has created a 512Mbit DDR-II memory chip, conforming > > with the JEDEC DDR-II standard set in March. > > And IBM has developed a DDR-II memory interface chip, > > meaning the high speed platform is almost ready to > > roll. > > > > The memory chip can transfer data at 533Mbps, claimed > > Samsung, but that can be extended to 666Mbps for > > special environments and for networks, the company > > said. > > > > The chip uses a 60 ball grid array package, and > > includes off chip driver calibration, on die > > termination and posted CAS for better bus efficiency. > > > > The firm will say that products will go into volume in > > the third quarter of 2003*.........." > > > > > > > >

"Andreas Nystrom" <[email hidden]> wrote in message news:bR5J8.40658$[email hidden] > 522Mbps?? Thats slow, thats rougly 52MB/sec. > I hope they mean 522MB/s :) I imagine that it's 522Mbps/per pin -JB

On Wed, 29 May 2002 14:46:31 GMT, "Andreas Nystrom" <[email hidden]> wrote: >522Mbps?? Thats slow, thats rougly 52MB/sec. Per _lead_. Most MoBo:s have 64bit wide mem buses. so: 64x533/8 ~= 4,3 GB/s >I hope they mean 522MB/s :) That's still slow... :)

na_biker <[email hidden]> writes:

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> On Wed, 29 May 2002 14:46:31 GMT, "Andreas Nystrom" <[email hidden]> > wrote: > > >522Mbps?? Thats slow, thats rougly 52MB/sec. > > Per _lead_. Most MoBo:s have 64bit wide mem buses. > > so: 64x533/8 ~= 4,3 GB/s

ok. I'll up that and hope they meant 522Mhz. that'd mean 8.6GB/s, and put us in business. :) -- Gunnar #31 SUCKS#015 Tupperware MC#002 DoD#0x1B DoDRT#003 DoD:CT#4,8 Kibo�: 2 "a poster is a human being or the software equivalent"

DDR2 is called QDR memory. It stands for Quad Data Rate. There is many memory technologies coming out and you don't EVER have to fear that there won't be memory fast enough as there is memory that can clock out at the rate of gigabits per second when referring to bitwide devices which are what memory cells are composed of. Also, instead of going one direction, there has been a recent pull to go into another direction where each memory cell (since each memory cell is simply a single transistor and capacitor) stores a non bit value. In other words, each cell is shifted out into what you call an analog register (a simple 4096 wide row of sample and holds which are then clocked out to a ADC converter rated into the Ghz range. THis allows storage which pushed technology to the envelope, giving you Ghz access speeds, using 1/8th the actual silicon and complexity while getting 8x speed output. Also, there is the common VRAM which was originally made by Texas instruments which stands for Video RAM. It can clock out memory much, much faster than our little syncronous memory. Then there is the non RAS/CAS memory which is a DRAM which doesn't use RAS/MUX/CAS signals, but instead completely eliminates multiplexing over its lines and true Random Acess (instead of Syncronous address access) at raes into speeds exceeding 1Gigabits per second per cell. The only problem is these devices are made with GalleniumArsenide which is very heat sensitive and does not like extremely small devices as it crumbles and developes microcracks much easier than typical metal oxide doped silicon or newer, much advanced technologies. Also, IBM is using tunneling transistors which use on the order of anywhere between one to four atoms to make a tiny storage cell for extremely low signals. The atoms are not directly accessed, they are accessed through an inductive format, kind of like old donut core memory except on the atomic level. "Gunnar Horrigmo" <[email hidden]> wrote in message news:[email hidden]...

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> na_biker <[email hidden]> writes: > > On Wed, 29 May 2002 14:46:31 GMT, "Andreas Nystrom" <[email hidden]> > > wrote: > > > > >522Mbps?? Thats slow, thats rougly 52MB/sec. > > > > Per _lead_. Most MoBo:s have 64bit wide mem buses. > > > > so: 64x533/8 ~= 4,3 GB/s > > ok. I'll up that and hope they meant 522Mhz. that'd mean 8.6GB/s, > and put us in business. :) > > -- > Gunnar > #31 SUCKS#015 Tupperware MC#002 DoD#0x1B DoDRT#003 DoD:CT#4,8 Kibo�: 2 > "a poster is a human being or the software equivalent"

"me" <[email hidden]> writes: > DDR2 is called QDR memory. It stands for Quad Data Rate. oh, aha! ok. I looked a bit at Samsung's websites and got the impression they weren't the same. > There is many > memory technologies coming out and you don't EVER have to fear that > there won't be memory fast enough as there is memory that can clock > out at the rate of gigabits per second when referring to bitwide > devices which are what memory cells are composed of. bah. nothing can ever be fast enough. :) thanks for clearing it up, "me", whoever you are. :) -- Gunnar #31 SUCKS#015 Tupperware MC#002 DoD#0x1B DoDRT#003 DoD:CT#4,8 Kibo�: 2 to err is human -- to forgive is bovine.

Wait until we go to *photonics* using photons(light) for carrying signals instead of *electronics* where we use electrons. Warp 10 years ahead please! "John Metcow" <[email hidden]> wrote in message news:[email hidden]...

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> this IS VERY INTERESTING := > > > ".......KOREAN DRAM GIANT Samsung will announce today > it has created a 512Mbit DDR-II memory chip, conforming > with the JEDEC DDR-II standard set in March. > And IBM has developed a DDR-II memory interface chip, > meaning the high speed platform is almost ready to > roll. > > The memory chip can transfer data at 533Mbps, claimed > Samsung, but that can be extended to 666Mbps for > special environments and for networks, the company > said. > > The chip uses a 60 ball grid array package, and > includes off chip driver calibration, on die > termination and posted CAS for better bus efficiency. > > The firm will say that products will go into volume in > the third quarter of 2003*.........." > > >

umm isnt 4 bits per clock cycle called QDR? just like the QDR FSB that the P4 uses. "John Metcow" <[email hidden]> wrote in message news:[email hidden]...

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> also > > "........The first spin of DDR technology doubled the > performance > of standard synchronous DRAM by pumping data bits on > both > the rising and falling edge of the clock cycle. Macri > said the > revised version doubles the total bandwidth again by > increasing > the data fetch from 2 to 4 bits. As a result, the same > 100-MHz > SDRAM core that became a 200-Mbit/s-per-pin DDR device > will > jump to 400 Mbits/s per pin with DDR-II. " > > > "John Metcow" <[email hidden]> wrote in message > news:... > > this IS VERY INTERESTING := > > > > > > ".......KOREAN DRAM GIANT Samsung will announce today > > it has created a 512Mbit DDR-II memory chip, > conforming > > with the JEDEC DDR-II standard set in March. > > And IBM has developed a DDR-II memory interface chip, > > meaning the high speed platform is almost ready to > > roll. > > > > The memory chip can transfer data at 533Mbps, claimed > > Samsung, but that can be extended to 666Mbps for > > special environments and for networks, the company > > said. > > > > The chip uses a 60 ball grid array package, and > > includes off chip driver calibration, on die > > termination and posted CAS for better bus efficiency. > > > > The firm will say that products will go into volume > in > > the third quarter of 2003*.........." > > > > > > > >

Tim O <[email hidden]> wrote in news:[email hidden]:

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> On Wed, 29 May 2002 09:21:23 +0800, "John Metcow" <[email hidden]> > wrote: > >>The memory chip can transfer data at 533Mbps, claimed >>Samsung, but that can be extended to 666Mbps for >>special environments and for networks, the company >>said. > > I wonder what they mean by "Special" environments? > Hmm... > > The night was black was no use holding back > Cos I just had to see was someone watching me? > In the mist dark figures move and twist > was all this for real or some kind of hell? > 666 megahertz RAM of The Beast > Hell and fire was spawned to be released! > > Torches blazed and sacred chants were praised > as they start to cry hands held to the sky > In the night the fires burning bright > the ritual has begun Satan's work is done > 666 megahertz RAM of The Beast > Sacrifice is going on tonight! > > This can't go on I must inform the law > Can this still be real or some crazy dream? > but I feel drawn towards the evil chanting hordes > they seem to mesmerize me...can't avoid their eyes! > 666 megahertz RAM of The Beast > 666 the one for you and me! > >

but will it make you a Powerslave or will you be caught Somewhere in Time? Chuck -- Beer is proof that God loves us and wants us to be happy. Benjamin Franklin

Internal clock multiplier, no magic involved. "John Metcow" <[email hidden]> wrote in message news:[email hidden]...

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> also > > "........The first spin of DDR technology doubled the > performance > of standard synchronous DRAM by pumping data bits on > both > the rising and falling edge of the clock cycle. Macri > said the > revised version doubles the total bandwidth again by > increasing > the data fetch from 2 to 4 bits. As a result, the same > 100-MHz > SDRAM core that became a 200-Mbit/s-per-pin DDR device > will > jump to 400 Mbits/s per pin with DDR-II. "

The issue is cost, not speed. There is memory that runs in the multi ghz range with true random access instead of syncronous memory access which is what everyone is using in the PC world. The PC world says the memory runs at 400Mhz and 533Mhz, that means it runs at a clocked out speed of that fast for ONLY successive memory accesses which are a single data step higher or lower. It doesn't mean that it works at true random access speeds that fast. IF you want to take random access speeds into consideration, todays memory when using completely random addresses runs in the order of roughly 20-50Mhz speed only if you were to apply a frequency counter to the access lines of today's memory.Not fast at all, but extremely fast compared to the very slow memory in the 70's and 80's. There is faster though, much fast but it costs out the ass and has low density or high density but extremely tempermental heating issues. "Gunnar Horrigmo" <[email hidden]> wrote in message news:[email hidden]...

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> "me" <[email hidden]> writes: > > > DDR2 is called QDR memory. It stands for Quad Data Rate. > > oh, aha! ok. I looked a bit at Samsung's websites and got the > impression they weren't the same. > > > There is many > > memory technologies coming out and you don't EVER have to fear that > > there won't be memory fast enough as there is memory that can clock > > out at the rate of gigabits per second when referring to bitwide > > devices which are what memory cells are composed of. > > bah. nothing can ever be fast enough. :) > > thanks for clearing it up, "me", whoever you are. :) > > -- > Gunnar > #31 SUCKS#015 Tupperware MC#002 DoD#0x1B DoDRT#003 DoD:CT#4,8 Kibo�: 2 > to err is human -- to forgive is bovine.

What's going to hold a light packet? It's not light that's the issue, it's holding the light in a light form because when you convert it to another format, then it gets reduced back down to near the speed of light instead of the speed of light. In reality it isn't even near the speed of light because of capacitance. It's reduced more into the THZ and GHZ ranges. Paralell processing is the trick. Doesn't matter how fast you go in sequence, it's how wide you can get. :) "HockeyTownUSA" <[email hidden]> wrote in message news:hKeJ8.71247$[email hidden]... > Wait until we go to *photonics* using photons(light) for carrying signals > instead of *electronics* where we use electrons. Warp 10 years aheadplease!

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> > > > "John Metcow" <[email hidden]> wrote in message > news:[email hidden]... > > this IS VERY INTERESTING := > > > > > > ".......KOREAN DRAM GIANT Samsung will announce today > > it has created a 512Mbit DDR-II memory chip, conforming > > with the JEDEC DDR-II standard set in March. > > And IBM has developed a DDR-II memory interface chip, > > meaning the high speed platform is almost ready to > > roll. > > > > The memory chip can transfer data at 533Mbps, claimed > > Samsung, but that can be extended to 666Mbps for > > special environments and for networks, the company > > said. > > > > The chip uses a 60 ball grid array package, and > > includes off chip driver calibration, on die > > termination and posted CAS for better bus efficiency. > > > > The firm will say that products will go into volume in > > the third quarter of 2003*.........." > > > > > > > >

It is. It is QDR technology also. It's a memory technology with a built in clock multiplier. No magic here. "someone" <[email hidden]> wrote in message news:dtnJ8.17139$[email hidden]... > umm isnt 4 bits per clock cycle called QDR? just like the QDR FSB that the > P4 uses.

Hehe, how creative. :) Also, 533Mhz is to 400Mhz what 666Mhz is to 533Mhz. In other words, it helps, but is not an earth shattering difference. On the other hand, 666Mhz compared to 400Mhz is a good leap, just not a leap from current 533Mhz. I'm running at 533Mhz. All it takes is a new memory which has the exact same RDRAM rating except for one timing signal which is 5ns tighter and it isn't even a memory cell speed issue, it's more of a MUX timing difference that allows us to jump in speed. I consider this not fair. If RDRAM cells could do the faster timing but it was restricted by another timing, then I consider RDRAM as ripping us off as they should make every cell accessable as fast as possible instead of selling us the same thing except with another timing issue just 5ns faster. That really sucks man having to change memory for such a small memory issue not related to memory cell speed. :/

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> > I wonder what they mean by "Special" environments? > > Hmm... > > > > The night was black was no use holding back > > Cos I just had to see was someone watching me? > > In the mist dark figures move and twist > > was all this for real or some kind of hell? > > 666 megahertz RAM of The Beast > > Hell and fire was spawned to be released! > > > > Torches blazed and sacred chants were praised > > as they start to cry hands held to the sky > > In the night the fires burning bright > > the ritual has begun Satan's work is done > > 666 megahertz RAM of The Beast > > Sacrifice is going on tonight! > > > > This can't go on I must inform the law > > Can this still be real or some crazy dream? > > but I feel drawn towards the evil chanting hordes > > they seem to mesmerize me...can't avoid their eyes! > > 666 megahertz RAM of The Beast > > 666 the one for you and me!

On Thu, 30 May 2002 11:18:56 GMT, "Chuck C." <[email hidden]> wrote:

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>> This can't go on I must inform the law >> Can this still be real or some crazy dream? >> but I feel drawn towards the evil chanting hordes >> they seem to mesmerize me...can't avoid their eyes! >> 666 megahertz RAM of The Beast >> 666 the one for you and me! >> >but will it make you a Powerslave or will you be caught Somewhere in >Time?

Chuck, I didn't think *anyone* was going to get that reference. :-) Tim

As a practical matter though, aren't most memory accesses done in large chunks? Is the true random access speed really significant? "me" <[email hidden]> wrote in message news:qfoJ8.44413$[email hidden]... > The issue is cost, not speed. There is memory that runs in the multighz > range with true random access instead of > syncronous memory access which is what everyone is using in the PCworld. > The PC world says the memory runs at 400Mhz > and 533Mhz, that means it runs at a clocked out speed of that fast forONLY > successive memory accesses which are a single > data step higher or lower. It doesn't mean that it works at truerandom > access speeds that fast. IF you want to take random > access speeds into consideration, todays memory when using completelyrandom > addresses runs in the order of roughly 20-50Mhz > speed only if you were to apply a frequency counter to the accesslines of > today's memory.Not fast at all, but extremely fast > compared to the very slow memory in the 70's and 80's. There is faster > though, much fast but it costs out the ass and has low > density or high density but extremely tempermental heating issues. >

> As a practical matter though, aren't most memory accesses done in large > chunks? That's not certain at all. Video card memory access is traditionally done in a rather predictable manner. Read a certain (part of a) texture into the cache, spit out a bundle of pixels, etc. However, pixel shader programs with dependable texture reads etc can scatter memory accesses considerably. CPU memory access patterns depend ENTIRELY on the program being executed. Some programs are cache friendly and hardly touch memory at all, some jump all over the place. > Is the true random access speed really significant? Yes. :-) The faster you get to your data the faster you can begin to process it.

533 Mbps? As in 0.533 GB/s? -- First of One, Primary Adjunctive Grid Alpha-01 Remove "NOT" from Email Address to Reply Mech Arena: http://daxin.netfirms.com/ FormulaSAE Racing: http://fsae.utoronto.ca/ "John Metcow" <[email hidden]> wrote in message news:[email hidden]... > this IS VERY INTERESTING := > > > ".......KOREAN DRAM GIANT Samsung will announce today > it has created a 512Mbit DDR-II memory chip, conforming > with the JEDEC DDR-II standard set in March. > And IBM has developed a DDR-II memory interface chip, > meaning the high speed platform is almost ready to > roll. > > The memory chip can transfer data at 533Mbps, claimed > Samsung, but that can be extended to 666Mbps for > special environments and for networks, the company > said. > > The chip uses a 60 ball grid array package, and > includes off chip driver calibration, on die > termination and posted CAS for better bus efficiency. > > The firm will say that products will go into volume in > the third quarter of 2003*.........." > > >

Tim O <[email hidden]> wrote in news:[email hidden]: > > Chuck, I didn't think *anyone* was going to get that reference. :-) > > Tim > > Oh, there's still a few of us dinosaurs out here!!! I'm still pissed the US didn't get a tour with "Brave New World" when Bruce came back! Chuck -- Beer is proof that God loves us and wants us to be happy. Benjamin Franklin

You don't mean that *gradually* PC's are entering the future of SIMD with ultra fast buses and minimal caches? You know, like where AGP is a minimal bus speed increase to a huge 64Mb (for example) chunk of video memory, rather than using the same few display instructions (such as translate) on a huge stream of similar data (such as vertices) along a bus - which seems to me to be a massively better way of doing things from a theoretical point of view. Of course synchronising a stream is a lot harder than 'brute-forcing' by downloading all the image data to video ram and altering it there, but why go for a neat, potentially-challenging-to-the-programmer solution, when the brute force is available? It's the PC/Microsoft/Intel way! Why develop this 533Mbps transfer potential when nothing is going to use it to its maximum? Might as well just stick a few more huge caches around the place and be done with it.

In message <[email hidden]>, Tim O <[email hidden]> writes

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>On Thu, 30 May 2002 11:18:56 GMT, "Chuck C." <[email hidden]> wrote: > >>> This can't go on I must inform the law >>> Can this still be real or some crazy dream? >>> but I feel drawn towards the evil chanting hordes >>> they seem to mesmerize me...can't avoid their eyes! >>> 666 megahertz RAM of The Beast >>> 666 the one for you and me! >>> > >>but will it make you a Powerslave or will you be caught Somewhere in >>Time? > >Chuck, I didn't think *anyone* was going to get that reference. :-) > >Tim > >

Apart from me (sad old NWOBHM fan)... -- Alun I read a report that said the typical symptoms of stress were eating too much, drinking too much, impulse buying, and driving too fast. Who are they kidding? That's my idea of a perfect day.